SqueezeNeXt Block

2000년 도입 · 논문 3편에서 사용

A SqueezeNeXt Block is a two-stage bottleneck module used in the SqueezeNeXt architecture to reduce the number of input channels to the 3 × 3 convolution. We decompose with separable convolutions to further reduce the number of parameters (orange parts), followed by a 1 × 1 expansion module.

출처: SqueezeNext: Hardware-Aware Neural Network Design

소개 논문: SqueezeNext: Hardware-Aware Neural Network Design