@article{exploringllmbasedverilogcodegenerationwi,
  title = {Exploring LLM-based Verilog Code Generation with Data-Efficient Fine-Tuning and Testbench Automation},
  author = {Mu-Chi Chen and Po-Hsuan Huang and Yu-Hung Kao and Yen-Fu Liu and Yu-Kai Hung and Cheng Liang and Shao-Chun Ho and Chia-Heng Tu and Shih-Hao Hung},
  year = {2026},
  eprint = {2604.15388},
  archivePrefix = {arXiv},
  url = {https://arxiv.org/abs/2604.15388},
}