paper-with-me

Papers

A Heuristic Approach to Two Level Boolean Minimization Derived from Karnaugh Mapping

2020-08-21 · Ethan L. Childerhose, Jingzhou Liu

The following paper presents a heuristic method by which sum-of-product Boolean expressions can be simplified with a specific focus on the removal of redundant and selective prime implicants. Existing methods, such as the Karnaugh map and the Quine-McCluskey method [1, 2], fail to scale since they increase exponentially in complexity as the quantity of literals increases, doing as such to ensure the solution is algorithmically obtained. By employing a heuristic model, nearly all expressions can be simplified at an overall reduction in computational complexity. This new method was derived from the fundamental Boolean laws, Karnaugh mapping, as well as truth tables.

📄 PDF Abstract BibTeX arXiv:2008.09307

Code (0)

등록된 구현이 없습니다.

Similar Papers 제목 키워드 기반

KarNet: An Efficient Boolean Function Simplifier

2019-06-04 · Shanka Subhra Mondal, Abhilash Nandy, Ritesh Agrawal, Debashis Sen

Many approaches such as Quine-McCluskey algorithm, Karnaugh map solving, Petrick's method and McBoole's method have been devised to simplify Boolean expressions in order to optimize hardware implementation of digital cir…

General Boolean Formula Minimization with QBF Solvers

2023-03-12 · Eduardo Calò, Jordi Levy

The minimization of propositional formulae is a classical problem in logic, whose first algorithms date back at least to the 1950s with the works of Quine and Karnaugh. Most previous work in the area has focused on obtai…

Quadratization of Symmetric Pseudo-Boolean Functions

2014-04-25 · Martin Anthony, Endre Boros, Yves Crama, Aritanan Gruber

A pseudo-Boolean function is a real-valued function $f(x)=f(x_1,x_2,\ldots,x_n)$ of $n$ binary variables; that is, a mapping from $\{0,1\}^n$ to $\mathbb{R}$. For a pseudo-Boolean function $f(x)$ on $\{0,1\}^n$, we say t…

INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search

2023-05-22 · Animesh Basak Chowdhury, Marco Romanelli, Benjamin Tan, Ramesh Karri 외

Logic synthesis is the first and most vital step in chip design. This steps converts a chip specification written in a hardware description language (such as Verilog) into an optimized implementation using Boolean logic …

Reinforcement Learning (RL)

Correct classification for big/smart/fast data machine learning

2016-09-27 · Sander Stepanov

Table (database) / Relational database Classification for big/smart/fast data machine learning is one of the most important tasks of predictive analytics and extracting valuable information from data. It is core applied …

BIG-bench Machine LearningClassificationGeneral Classification