Compiler Auto-Vectorization with Imitation Learning

2019-12-01 · NeurIPS 2019 12 · Charith Mendis, Cambridge Yang, Yewen Pu, Dr.Saman Amarasinghe, Michael Carbin

Modern microprocessors are equipped with single instruction multiple data (SIMD) or vector instruction sets which allow compilers to exploit fine-grained data level parallelism. To exploit this parallelism, compilers employ auto-vectorization techniques to automatically convert scalar code into vector code. Larsen & Amarasinghe (2000) first introduced superword level parallelism (SLP) based vectorization, which is one form of vectorization popularly used by compilers. Current compilers employ hand-crafted heuristics and typically only follow one SLP vectorization strategy which can be suboptimal. Recently, Mendis & Amarasinghe (2018) formulated the instruction packing problem of SLP vectorization by leveraging an integer linear programming (ILP) solver, achieving superior runtime performance. In this work, we explore whether it is feasible to imitate optimal decisions made by their ILP solution by fitting a graph neural network policy. We show that the learnt policy produces a vectorization scheme which is better than industry standard compiler heuristics both in terms of static measures and runtime performance. More specifically, the learnt agent produces a vectorization scheme which has a 22.6% higher average reduction in cost compared to LLVM compiler when measured using its own cost model and achieves a geometric mean runtime speedup of 1.015× on the NAS benchmark suite when compared to LLVM’s SLP vectorizer.

📄 PDF Abstract BibTeX

Code (1)

ithemal/vemal 공식 구현

Tasks

Graph Neural NetworkImitation Learning

Methods 이 논문이 사용한 방법론

Graph Neural Network 설명 없음

VecTrans: Enhancing Compiler Auto-Vectorization through LLM-Assisted Code Transformations

2025-03-25 · Zhongchun Zheng, Kan Wu, Long Cheng, Lu Li 외

Auto-vectorization is a fundamental optimization for modern compilers to exploit SIMD parallelism. However, state-of-the-art approaches still struggle to handle intricate code patterns, often requiring manual hints or do…

Code Generation

LLM-Vectorizer: LLM-based Verified Loop Vectorizer

2024-06-07 · Jubi Taneja, Avery Laird, Cong Yan, Madan Musuvathi 외

Vectorization is a powerful optimization technique that significantly boosts the performance of high performance computing applications operating on large data arrays. Despite decades of research on auto-vectorization, c…

AutoVecCoder: Teaching LLMs to Generate Explicitly Vectorized Code

2026-05-18 · Shangzhan Li, Xinyu Yin, Xuanyu Jin, Ye He 외 arxiv

Vectorization via Single Instruction, Multiple Data (SIMD) architectures is a cornerstone of high-performance computing. To fully exploit hardware potential, developers often resort to explicit vectorization using intrin…

Reinforcement Learning Code Generation

Analyzing Latency Hiding and Parallelism in an MLIR-based AI Kernel Compiler

2026-02-22 · Javed Absar, Samarth Narang, Muthu Baskaran arxiv

AI kernel compilation for edge devices depends on the compiler's ability to exploit parallelism and hide memory latency in the presence of hierarchical memory and explicit data movement. This paper reports a benchmark me…

Tensor Program Optimization for the RISC-V Vector Extension Using Probabilistic Programs

2025-07-02 · Federico Nicolas Peccia, Frederik Haxel, Oliver Bringmann arxiv

RISC-V provides a flexible and scalable platform for applications ranging from embedded devices to high-performance computing clusters. Particularly, its RISC-V Vector Extension (RVV) becomes of interest for the accelera…