Papers High-Level Synthesis
“High-Level Synthesis” 태그가 달린 논문 96편 · 필터 해제
Iceberg: Enhancing HLS Modeling with Synthetic Data
Deep learning-based prediction models for High-Level Synthesis (HLS) of hardware designs often struggle to generalize. In this paper, we study how to close the generalizability gap of these models through pretraining on …
Data AugmentationHigh-Level SynthesisLanguage ModelingLanguage Modelling+2Embedded FPGA Acceleration of Brain-Like Neural Networks: Online Learning to Scalable Inference
Edge AI applications increasingly require models that can learn and adapt on-device with minimal energy budget. Traditional deep learning models, while powerful, are often overparameterized, energy-hungry, and dependent …
High-Level SynthesisiDSE: Navigating Design Space Exploration in High-Level Synthesis Using LLMs
High-Level Synthesis (HLS) serves as an agile hardware development tool that streamlines the circuit design by abstracting the register transfer level into behavioral descriptions, while allowing designers to customize t…
High-Level SynthesisMultiobjective OptimizationNavigateLLM-DSE: Searching Accelerator Parameters with LLM Agents
Even though high-level synthesis (HLS) tools mitigate the challenges of programming domain-specific accelerators (DSAs) by raising the abstraction level, optimizing hardware directive parameters remains a significant hur…
High-Level SynthesisIntelligent4DSE: Optimizing High-Level Synthesis Design Space Exploration with Graph Neural Networks and Large Language Models
High-level synthesis (HLS) design space exploration (DSE) is an optimization process in electronic design automation (EDA) that systematically explores high-level design configurations to achieve Pareto-optimal hardware …
Evolutionary AlgorithmsGraph Neural NetworkHigh-Level SynthesisLarge Language Model+1HLS-Eval: A Benchmark and Framework for Evaluating LLMs on High-Level Synthesis Design Tasks
The rapid scaling of large language model (LLM) training and inference has driven their adoption in semiconductor design across academia and industry. While most prior work evaluates LLMs on hardware description language…
High-Level SynthesisLarge Language ModelEnhancing CuFP Library with Self-Alignment Technique
High-Level Synthesis (HLS) tools have transformed FPGA development by streamlining digital design and enhancing efficiency. Meanwhile, advancements in semiconductor technology now support the integration of hundreds of f…
High-Level SynthesisDesign and Implementation of an FPGA-Based Hardware Accelerator for Transformer
Transformer-based large language models (LLMs) rely heavily on intensive matrix multiplications for attention and feed-forward layers, with the Q, K, and V linear projections in the Multi-Head Self-Attention (MHA) module…
CPUHigh-Level SynthesisCan Reasoning Models Reason about Hardware? An Agentic HLS Perspective
Recent Large Language Models (LLMs) such as OpenAI o3-mini and DeepSeek-R1 use enhanced reasoning through Chain-of-Thought (CoT). Their potential in hardware design, which relies on expert-driven iterative optimization, …
High-Level SynthesisA Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks
Brain-inspired algorithms are attractive and emerging alternatives to classical deep learning methods for use in various machine learning applications. Brain-inspired systems can feature local learning rules, both unsupe…
GPUHigh-Level SynthesisExploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis
Recent advances in code generation have illuminated the potential of employing large language models (LLMs) for general-purpose programming languages such as Python and C++, opening new opportunities for automating softw…
Code GenerationHigh-Level SynthesisMetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Acceleration
This paper presents a unified framework for codifying and automating optimization strategies to efficiently deploy deep neural networks (DNNs) on resource-constrained hardware, such as FPGAs, while maintaining high perfo…
Bayesian OptimizationHigh-Level SynthesisNeural Architecture Codesign for Fast Physics Applications
We develop a pipeline to streamline neural architecture codesign for physics applications to reduce the need for ML expertise when designing models for novel tasks. Our method employs neural architecture search and netwo…
High-Level SynthesisModel CompressionNetwork PruningNeural Architecture Search+1Intelligent experiments through real-time AI: Fast Data Processing and Autonomous Detector Control for sPHENIX and future EIC detectors
This R\&D project, initiated by the DOE Nuclear Physics AI-Machine Learning initiative in 2022, leverages AI to address data processing challenges in high-energy nuclear experiments (RHIC, LHC, and future EIC). Our focus…
Graph Neural NetworkHigh-Level SynthesisAgentic-HLS: An agentic reasoning based high-level synthesis system using large language models (AI for EDA workshop 2024)
Our aim for the ML Contest for Chip Design with HLS 2024 was to predict the validity, running latency in the form of cycle counts, utilization rate of BRAM (util-BRAM), utilization rate of lookup tables (uti-LUT), utiliz…
BenchmarkingHigh-Level SynthesisKALAM: toolKit for Automating high-Level synthesis of Analog computing systeMs
Diverse computing paradigms have emerged to meet the growing needs for intelligent energy-efficient systems. The Margin Propagation (MP) framework, being one such initiative in the analog computing domain, stands out due…
Bayesian InferenceHigh-Level SynthesisHierarchical Mixture of Experts: Generalizable Learning for High-Level Synthesis
High-level synthesis (HLS) is a widely used tool in designing Field Programmable Gate Array (FPGA). HLS enables FPGA design with software programming languages by compiling the source code into an FPGA circuit. The sourc…
High-Level SynthesisMixture-of-ExpertsLearning to Compare Hardware Designs for High-Level Synthesis
High-level synthesis (HLS) is an automated design process that transforms high-level code into hardware designs, enabling the rapid development of hardware accelerators. HLS relies on pragmas, which are directives insert…
High-Level SynthesisAre LLMs Any Good for High-Level Synthesis?
The increasing complexity and demand for faster, energy-efficient hardware designs necessitate innovative High-Level Synthesis (HLS) methodologies. This paper explores the potential of Large Language Models (LLMs) to str…
C++ codeHigh-Level SynthesisEfficient Task Transfer for HLS DSE
There have been several recent works proposed to utilize model-based optimization methods to improve the productivity of using high-level synthesis (HLS) to design domain-specific architectures. They would replace the ti…
High-Level SynthesisTransfer Learning